Faraday Technology Corporation announced the availability of its MPEG-4 codec IP, which achieves 4CIF (720 x 576) resolution at low bit rates for multimedia applications such as camcorders, digital video recorders (DVRs), DVD players, video conference equipments, surveillance products, set-top-boxes, and other media-intensive products.

The MPEG-4 engine includes a video and image compression/decompression IP core, a DMA controller, and a video capture functional block. In addition to this new MPEG-4 engine, Faraday's multimedia platform solution employs an ARM core or other microcontroller, an AMBA bus, and modularized hardware/software IPs, to provide greater flexibility of being integrated with other functional blocks.

Faraday's FTMCP100 is a video and image compression/decompression IP core supporting MPEG-4 (ISO/IEC 14496-2) simple profile L0 ~ L3 standard and JPEG (ISO/IEC 10918-1) base-line standard. Depending on the CPU firmware, it can support MPEG4 or JPEG encoding and decoding. The FTMCP100 supports up to 30 frames per second (fps) at 4CIF (720 x 576) resolution; it also supports other standard resolutions (sub QCIF, QCIF, CIF, and VGA) and non-standards on 16-pixel steps.

Faraday's MPEG-4 codec IP also features high resolution, minimum CPU load, a small gate count, small internal memory blocks, and low power consumption. At 4CIF, 30 fps mode, the MPEG4 encode frequency is 85MHz, and the CPU load is 36 MHz. The total gate count is just155K gates. The internal RAM is 10K Byte and External DRAM is 1215K Byte. When manufactured on UMC's 0.18um standard process, the power consumption is only 1.2 mW/MHz.

www.faraday-tech.com